ISU - Exercise 2
Building C++ programs for host
1st exercise
The hello world code, simple but just for info.
G++ is the compiler.
-o is an option that tells the compiler to make an output file, ie. an executable file.
When -o is used the compiler needs a name for the output file, in this case hello, and it needs a sourcefile, here it's hello.cpp.
As shown the executable file is called by using ./ to indicate the current folder and the name of the file: ./hello
2nd exercise
Variables like SOURCES and OBJECTS are variable that kinda holds strings, so when they are called they will put in the string they hold on the place where they are called.
Variables can be manipulated by options too, like in line 2 where OBJECTS takes alle the sourcesfiles and make them end on .o instead of .cpp
#pragma once caused some kind of alert. Using #ifndef ... #define .......... #endif will not trigger the same alert.
Listing 4.2 has added a target "makefile.d" and has a dependency of the default target.
The makefile.d creates a list of dependencies of the target. This list is written in the makefile.d file
The last line that contains the makefile has a minus sign (-) in the beginning, this will supress errors in case the makefile.d does not exist.
The makefile.d does not necessarily exist since it is not created till the target makefile.d is run.
Variable can be called by using $() or by ${} but the $ is very important either way.
The call of $^ is a build-in function that takes the line above and puts it in the line where $^ is, eg. in the 6th line all OBJECTS that are dependencies of the "all" will be used as sources in linking for the executable
The option -c tells the G++ compiler that it has to stop after compiler. The output will be an objectfile instead of an executable.
3rd exercise
Part2.cpp and Part2.h are completely identical to the 2 pictures shown for Part1#pragma once caused some kind of alert. Using #ifndef ... #define .......... #endif will not trigger the same alert.
Part1.h (header)
Part1.cpp (source)
main.cpp
Makefile
In the makefile it should be noted that no headers are included as sources. This is done for two reasons: 1 - it's not necessary, 2 - when the clean up is run it will remove all the header files because the OBJECTS variable does not make any change to the .h-ending.
The .h.gch are precompiled headers that we'd want to get rid of in a cleanup too.
4th exercise
Listing 4.1
In the example the compiler assumes that when making a <name>.o file the sources is probably <name>.cpp (or .c). The compiler does so by defined implicit rules.
This proves a problem if the objectfile has 2 or more dependencies. In this case the compiler can't handle this approach properly by it's implicit rules.
Listing 4.2
The important parts are present in all the exercises:
SvarSlet- The direct compiler invocation is shown in exercise 1.
- In exercise 2 the makefile is used correctly and the variables is defined in the top of the file as instructed in the exercise description.
- In exercise 3 the makefile is used correctly to compile several parts at once. All the targets are made as instructed. Great detail in separating the sources and headers into two groups at the top of the file.
- In exercise 4 there is shown a good understanding of the behaviour of the two different makefiles.
Generally it is a very good and informative solution to the exercise. We learned a lot of nifty things by reading it. The only thing missing would be the exercise descriptions, so they would be combined together with the solutions to the exercies which makes for an easier reading and understanding.